In order to stack IC die in a face-to-face manner using standard flip-chip assembly techniques, the assembly is conventionally performed in a sequential manner by bonding a first thinned IC die then a second thinned IC die (e.g., a thinned die 25 to 150 μm thick) onto a package substrate (e.g., PCB). In a typical arrangement, the first IC die can be a TSV comprising die that is mounted face (i.e. active circuit/top side) up on the surface of a package substrate where the TSVs form joints with pads on the package substrate surface. Capillary underfill is then generally performed. The second IC die is then generally flip-chip (FC) mounted to the top side of the first IC die.
Problems with this conventional sequential stacked die assembly technique include difficulties with die-to die jointing via bumps because the first IC die mounted on the package substrate may have significant warpage/bow. In addition, since both IC die are thinned and the top sides are exposed during assembly, IC die handling is generally difficult and can result in yield loss due to cracked IC die or scratching of the IC die.
Stacked die can also be formed by die-to-wafer methods (D2W). In one known D2W method, die-wafer stacks are formed by thinning a TSV wafer (e.g. to <100 μm thick) using a carrier wafer bonded to the top side of the TSV wafer to expose the TSVs tips on the bottom side of the TSV wafer. The carrier wafer is then removed and then the IC die are bonded to the top side of the thinned TSV wafer. However, warpage of the thinned TSV wafer can complicate jointing/bonding with the IC die. For example, as known in the art, warpage results in misaligned joints which reduces contact area which increases contact resistance of the joint, particularly for fine pitched pads, and can even cause open circuited contacts.
Moreover, conventional thin die-wafer stacks are difficult to handle which can result in scratching and a tendency to crack. In a second known D2W method, thinned IC die are bonded to the top of a TSV wafer and then the TSV is thinned from its bottom side to expose the TSVs on the bottom side of the TSV wafer. Due to warpage/bending of the TSV wafer during TSV tip exposure which increases as the wafer thinning precedes, this second known D2W method can result in significant TSV tip height variation including significant height variation across individual IC die which can cause bonding problems during subsequent bonding of the TSV tips of the die stack to a package substrate.
The bonding of wafers to TSV wafers (W2W) shares some of the same challenges that are described above with respect to the D2W methods. Accordingly, new assembly processes are needed for bonding die or wafers to TSV comprising wafers.